diff --git a/.gitignore b/.gitignore
index 10afc02323686919942d6ea9f6d3f8d29448d370..2ccf51509dcf9ba8003979ccf6a2d2be6586d7ec 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,7 +1,9 @@
 # Files
+*.bak
 *.txt
 *.stp
 *.qws
+*.qdf
 *.qicache
 hps.pre.xml
 transcript
@@ -14,7 +16,9 @@ vsim.wlf
 **/outputs/*
 **/work/*
 **/output_files/*
+**/simulation/*
 **/db/*
 **/incremental_db/*
 **/hps_isw_handoff/*
-
+**/qdb/*
+**/tmp_svunit/
\ No newline at end of file
diff --git a/quartus/qsys/arria10_hps/altera_arria10_interface_generator_140/synth/hps.pre.xml b/quartus/qsys/arria10_hps/altera_arria10_interface_generator_140/synth/hps.pre.xml
deleted file mode 100644
index 80692bf98e90030410e77e031e2791970036f835..0000000000000000000000000000000000000000
--- a/quartus/qsys/arria10_hps/altera_arria10_interface_generator_140/synth/hps.pre.xml
+++ /dev/null
@@ -1,351 +0,0 @@
-<hps>
-  <system>
-    <config name='VERSION' value='22.1' />
-    <config name='DEVICE_FAMILY' value='Arria 10' />
-    <config name='TIME_AND_DATE' value='Friday June, 14, 2024 - 04:05:00 PM CEST' />
-    <config name='DMA_Enable' value='No No No No No No No No' />
-    <config name='eosc1_clk_hz' value='25000000.0' />
-    <config name='emac0_clk_hz' value='250000000' />
-    <config name='emac1_clk_hz' value='250000000' />
-    <config name='emac2_clk_hz' value='250000000' />
-    <config name='sdmmc_clk_hz' value='200000000' />
-    <config name='l3_main_free_clk_hz' value='200000000' />
-    <config name='h2f_user0_clk_hz' value='400000000' />
-    <config name='h2f_user1_clk_hz' value='400000000' />
-    <config name='tpiu_clk_hz' value='100000000' />
-    <config name='f2h_free_clk_hz' value='200000000' />
-    <config name='cb_intosc_ls_clk_hz' value='60000000' />
-  </system>
-  <fpga_interfaces>
-    <config name='F2H_AXI_SLAVE' used='true' />
-    <config name='H2F_AXI_MASTER' used='true' />
-    <config name='LWH2F_AXI_MASTER' used='true' />
-    <config name='F2SDRAM0_AXI_SLAVE' used='false' />
-    <config name='F2SDRAM1_AXI_SLAVE' used='false' />
-    <config name='F2SDRAM2_AXI_SLAVE' used='false' />
-  </fpga_interfaces>
-  <peripherals>
-    <peripheral name='rgmii0' used='true' />
-    <peripheral name='rgmii1' used='false' />
-    <peripheral name='rgmii2' used='false' />
-    <peripheral name='nand' used='false' />
-    <peripheral name='qspi' used='false'>
-      <config name='CONFIG_HPS_QSPI_CS2' value='0' />
-      <config name='CONFIG_HPS_QSPI_CS3' value='0' />
-      <config name='CONFIG_HPS_QSPI_CS4' value='0' />
-      <config name='CONFIG_HPS_QSPI_CS0' value='0' />
-      <config name='CONFIG_HPS_QSPI_CS1' value='0' />
-    </peripheral>
-    <peripheral name='sdmmc' used='true'>
-      <config name='CONFIG_HPS_SDMMC_BUSWIDTH' value='8' />
-    </peripheral>
-    <peripheral name='usb0' used='true' />
-    <peripheral name='usb1' used='false' />
-    <peripheral name='spim0' used='false' />
-    <peripheral name='spim1' used='true' />
-    <peripheral name='spis0' used='false' />
-    <peripheral name='spis1' used='false' />
-    <peripheral name='uart0' used='false'>
-      <config name='CONFIG_HPS_UART0_TX' value='0' />
-      <config name='CONFIG_HPS_UART0_RTS' value='0' />
-      <config name='CONFIG_HPS_UART0_CTS' value='0' />
-      <config name='CONFIG_HPS_UART0_RX' value='0' />
-    </peripheral>
-    <peripheral name='uart1' used='true'>
-      <config name='CONFIG_HPS_UART1_TX' value='1' />
-      <config name='CONFIG_HPS_UART1_RTS' value='0' />
-      <config name='CONFIG_HPS_UART1_CTS' value='0' />
-      <config name='CONFIG_HPS_UART1_RX' value='1' />
-    </peripheral>
-    <peripheral name='i2c0' used='false' />
-    <peripheral name='i2c1' used='true' />
-    <peripheral name='i2cemac0' used='false' />
-    <peripheral name='i2cemac1' used='false' />
-    <peripheral name='i2cemac2' used='false' />
-    <peripheral name='trace' used='false' />
-    <peripheral name='pll_clock_out' used='false' />
-  </peripherals>
-  <csr>
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q4_12.sel' value='10' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q4_11.sel' value='10' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.pinmux_dedicated_io_4.sel' value='8' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q4_10.sel' value='10' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.pinmux_dedicated_io_5.sel' value='8' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.pinmux_dedicated_io_6.sel' value='8' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q4_9.sel' value='10' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.pinmux_dedicated_io_7.sel' value='8' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q4_8.sel' value='10' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.pinmux_dedicated_io_8.sel' value='8' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q4_6.sel' value='10' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q4_7.sel' value='10' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q4_5.sel' value='10' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.pinmux_dedicated_io_9.sel' value='8' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q4_4.sel' value='10' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.pinmux_dedicated_io_10.sel' value='10' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q4_3.sel' value='10' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.pinmux_dedicated_io_11.sel' value='10' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q4_2.sel' value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.pinmux_dedicated_io_12.sel' value='8' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q4_1.sel' value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.pinmux_dedicated_io_13.sel' value='8' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q3_12.sel' value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.pinmux_dedicated_io_14.sel' value='8' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q3_11.sel' value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.pinmux_dedicated_io_15.sel' value='8' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.pinmux_dedicated_io_16.sel' value='13' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.pinmux_dedicated_io_17.sel' value='13' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q3_10.sel' value='10' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q3_8.sel' value='10' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q3_9.sel' value='10' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q3_7.sel' value='10' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q3_6.sel' value='10' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q3_5.sel' value='3' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q3_4.sel' value='3' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q3_3.sel' value='3' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q3_2.sel' value='3' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q3_1.sel' value='3' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q2_12.sel' value='4' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q2_10.sel' value='4' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q2_11.sel' value='4' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q2_9.sel' value='4' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q2_8.sel' value='4' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q2_7.sel' value='4' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q2_6.sel' value='4' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q2_5.sel' value='4' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q2_4.sel' value='4' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q2_3.sel' value='4' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q2_2.sel' value='4' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q2_1.sel' value='4' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q1_12.sel' value='8' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q1_11.sel' value='8' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q1_10.sel' value='8' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q1_9.sel' value='8' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q1_8.sel' value='8' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q1_7.sel' value='8' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q1_6.sel' value='8' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q1_5.sel' value='8' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q1_4.sel' value='8' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q1_3.sel' value='8' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q1_2.sel' value='8' />
-    <config name='i_io48_pin_mux_shared_3v_io_grp.pinmux_shared_io_q1_1.sel' value='8' />
-    <config name='i_io48_pin_mux_fpga_interface_grp.pinmux_rgmii0_usefpga.sel' value='0' />
-    <config name='i_io48_pin_mux_fpga_interface_grp.pinmux_rgmii1_usefpga.sel' value='0' />
-    <config name='i_io48_pin_mux_fpga_interface_grp.pinmux_rgmii2_usefpga.sel' value='0' />
-    <config name='i_io48_pin_mux_fpga_interface_grp.pinmux_nand_usefpga.sel' value='0' />
-    <config name='i_io48_pin_mux_fpga_interface_grp.pinmux_qspi_usefpga.sel' value='0' />
-    <config name='i_io48_pin_mux_fpga_interface_grp.pinmux_sdmmc_usefpga.sel' value='0' />
-    <config name='i_io48_pin_mux_fpga_interface_grp.pinmux_usb0_usefpga.sel' value='0' />
-    <config name='i_io48_pin_mux_fpga_interface_grp.pinmux_usb1_usefpga.sel' value='0' />
-    <config name='i_io48_pin_mux_fpga_interface_grp.pinmux_spim0_usefpga.sel' value='0' />
-    <config name='i_io48_pin_mux_fpga_interface_grp.pinmux_spim1_usefpga.sel' value='0' />
-    <config name='i_io48_pin_mux_fpga_interface_grp.pinmux_spis0_usefpga.sel' value='0' />
-    <config name='i_io48_pin_mux_fpga_interface_grp.pinmux_spis1_usefpga.sel' value='0' />
-    <config name='i_io48_pin_mux_fpga_interface_grp.pinmux_uart0_usefpga.sel' value='0' />
-    <config name='i_io48_pin_mux_fpga_interface_grp.pinmux_uart1_usefpga.sel' value='0' />
-    <config name='i_io48_pin_mux_fpga_interface_grp.pinmux_i2c0_usefpga.sel' value='0' />
-    <config name='i_io48_pin_mux_fpga_interface_grp.pinmux_i2c1_usefpga.sel' value='0' />
-    <config name='i_io48_pin_mux_fpga_interface_grp.pinmux_i2cemac0_usefpga.sel' value='0' />
-    <config name='i_io48_pin_mux_fpga_interface_grp.pinmux_i2cemac1_usefpga.sel' value='0' />
-    <config name='i_io48_pin_mux_fpga_interface_grp.pinmux_i2cemac2_usefpga.sel' value='0' />
-    <config name='i_io48_pin_mux_fpga_interface_grp.pinmux_pll_clock_out_usefpga.sel' value='0' />
-    <config name='i_clk_mgr_alteragrp.nocclk.maincnt' value='11' />
-    <config name='i_clk_mgr_perpllgrp.vco1.denom' value='1' />
-    <config name='i_clk_mgr_mainpllgrp.cntr8clk.cnt' value='900' />
-    <config name='i_clk_mgr_perpllgrp.emacctl.emac2sel' value='0' />
-    <config name='i_clk_mgr_mainpllgrp.cntr9clk.cnt' value='900' />
-    <config name='i_clk_mgr_mainpllgrp.cntr6clk.cnt' value='900' />
-    <config name='i_clk_mgr_alteragrp.mpuclk.pericnt' value='900' />
-    <config name='i_clk_mgr_alteragrp.mpuclk.maincnt' value='1' />
-    <config name='i_clk_mgr_perpllgrp.cntr3clk.cnt' value='900' />
-    <config name='i_clk_mgr_perpllgrp.cntr6clk.src' value='1' />
-    <config name='i_clk_mgr_mainpllgrp.cntr2clk.cnt' value='900' />
-    <config name='i_clk_mgr_mainpllgrp.nocdiv.l4mpclk' value='0' />
-    <config name='i_clk_mgr_perpllgrp.cntr4clk.src' value='1' />
-    <config name='i_clk_mgr_perpllgrp.emacctl.emac0sel' value='0' />
-    <config name='i_clk_mgr_mainpllgrp.nocclk.cnt' value='0' />
-    <config name='i_clk_mgr_mainpllgrp.nocdiv.l4spclk' value='2' />
-    <config name='i_clk_mgr_perpllgrp.gpiodiv.gpiodbclk' value='32000' />
-    <config name='i_clk_mgr_perpllgrp.cntr3clk.src' value='1' />
-    <config name='i_clk_mgr_perpllgrp.cntr8clk.src' value='0' />
-    <config name='i_clk_mgr_mainpllgrp.vco1.numer' value='191' />
-    <config name='i_clk_mgr_perpllgrp.cntr8clk.cnt' value='900' />
-    <config name='i_clk_mgr_mainpllgrp.nocdiv.csatclk' value='0' />
-    <config name='i_clk_mgr_mainpllgrp.nocdiv.cspdbgclk' value='1' />
-    <config name='i_clk_mgr_mainpllgrp.mpuclk.cnt' value='0' />
-    <config name='i_clk_mgr_perpllgrp.cntr5clk.cnt' value='499' />
-    <config name='i_clk_mgr_perpllgrp.cntr6clk.cnt' value='9' />
-    <config name='i_clk_mgr_perpllgrp.cntr5clk.src' value='1' />
-    <config name='i_clk_mgr_perpllgrp.cntr2clk.src' value='1' />
-    <config name='i_clk_mgr_mainpllgrp.nocdiv.cstraceclk' value='1' />
-    <config name='i_clk_mgr_mainpllgrp.nocdiv.l4mainclk' value='0' />
-    <config name='i_clk_mgr_clkmgr.testioctrl.periclksel' value='8' />
-    <config name='i_clk_mgr_mainpllgrp.cntr7clk.src' value='0' />
-    <config name='i_clk_mgr_mainpllgrp.cntr7clk.cnt' value='900' />
-    <config name='i_clk_mgr_mainpllgrp.mpuclk.src' value='0' />
-    <config name='i_clk_mgr_mainpllgrp.cntr5clk.cnt' value='900' />
-    <config name='i_clk_mgr_mainpllgrp.vco1.denom' value='1' />
-    <config name='i_clk_mgr_mainpllgrp.cntr9clk.src' value='0' />
-    <config name='i_clk_mgr_clkmgr.testioctrl.debugclksel' value='16' />
-    <config name='i_clk_mgr_mainpllgrp.nocclk.src' value='0' />
-    <config name='i_clk_mgr_perpllgrp.cntr2clk.cnt' value='7' />
-    <config name='i_clk_mgr_perpllgrp.emacctl.emac1sel' value='0' />
-    <config name='i_clk_mgr_mainpllgrp.cntr3clk.cnt' value='900' />
-    <config name='i_clk_mgr_perpllgrp.vco0.psrc' value='0' />
-    <config name='i_clk_mgr_mainpllgrp.cntr4clk.cnt' value='900' />
-    <config name='i_clk_mgr_mainpllgrp.cntr15clk.cnt' value='900' />
-    <config name='i_clk_mgr_perpllgrp.vco1.numer' value='159' />
-    <config name='i_clk_mgr_clkmgr.testioctrl.mainclksel' value='8' />
-    <config name='i_clk_mgr_mainpllgrp.vco0.psrc' value='0' />
-    <config name='i_clk_mgr_alteragrp.nocclk.pericnt' value='900' />
-    <config name='i_clk_mgr_perpllgrp.cntr4clk.cnt' value='19' />
-    <config name='i_clk_mgr_perpllgrp.cntr7clk.cnt' value='900' />
-    <config name='i_clk_mgr_perpllgrp.cntr9clk.cnt' value='900' />
-  </csr>
-  <csr />
-  <!-- This section was added by Quartus Prime Version 22.1std.2 Build 922 07/20/2023 SC Standard Edition -->
-  <!-- Generated on Wed Jul  3 15:34:46 2024 -->
-  <csr>
-    <!-- OSC_CLK_1_HPS -->
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_1.rtrim'        value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_1.input_buf_en' value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_1.wk_pu_en'     value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_1.pu_slw_rt'    value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_1.pd_slw_rt'    value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_1.pu_drv_strg'  value='8' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_1.pd_drv_strg'  value='10' />
-    <!-- nPOR_HPS -->
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_2.rtrim'        value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_2.input_buf_en' value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_2.wk_pu_en'     value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_2.pu_slw_rt'    value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_2.pd_slw_rt'    value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_2.pu_drv_strg'  value='8' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_2.pd_drv_strg'  value='10' />
-    <!-- nRST_HPS -->
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_3.rtrim'        value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_3.input_buf_en' value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_3.wk_pu_en'     value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_3.pu_slw_rt'    value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_3.pd_slw_rt'    value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_3.pu_drv_strg'  value='8' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_3.pd_drv_strg'  value='10' />
-    <!-- hps_sdio_D0, HPS_DEDICATED_4, input, weak pull up disable, is output, Fast Slew, 1_8 -->
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_4.rtrim'        value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_4.input_buf_en' value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_4.wk_pu_en'     value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_4.pu_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_4.pd_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_4.pu_drv_strg'  value='8' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_4.pd_drv_strg'  value='10' />
-    <!-- hps_sdio_CMD, HPS_DEDICATED_5, input, weak pull up disable, is output, Fast Slew, 1_8 -->
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_5.rtrim'        value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_5.input_buf_en' value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_5.wk_pu_en'     value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_5.pu_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_5.pd_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_5.pu_drv_strg'  value='8' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_5.pd_drv_strg'  value='10' />
-    <!-- hps_sdio_CLK, BOOTSEL2/HPS_DEDICATED_6, NOT input, weak pull up disable, is output, Fast Slew, 1_8 -->
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_6.rtrim'        value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_6.input_buf_en' value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_6.wk_pu_en'     value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_6.pu_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_6.pd_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_6.pu_drv_strg'  value='8' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_6.pd_drv_strg'  value='10' />
-    <!-- hps_sdio_D1, HPS_DEDICATED_7, input, weak pull up disable, is output, Fast Slew, 1_8 -->
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_7.rtrim'        value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_7.input_buf_en' value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_7.wk_pu_en'     value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_7.pu_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_7.pd_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_7.pu_drv_strg'  value='8' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_7.pd_drv_strg'  value='10' />
-    <!-- hps_sdio_D2, HPS_DEDICATED_8, input, weak pull up disable, is output, Fast Slew, 1_8 -->
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_8.rtrim'        value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_8.input_buf_en' value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_8.wk_pu_en'     value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_8.pu_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_8.pd_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_8.pu_drv_strg'  value='8' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_8.pd_drv_strg'  value='10' />
-    <!-- hps_sdio_D3, HPS_DEDICATED_9, input, weak pull up disable, is output, Fast Slew, 1_8 -->
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_9.rtrim'        value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_9.input_buf_en' value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_9.wk_pu_en'     value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_9.pu_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_9.pd_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_9.pu_drv_strg'  value='8' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_9.pd_drv_strg'  value='10' />
-    <!-- Unused pin 10 -->
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_10.rtrim'        value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_10.input_buf_en' value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_10.wk_pu_en'     value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_10.pu_slw_rt'    value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_10.pd_slw_rt'    value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_10.pu_drv_strg'  value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_10.pd_drv_strg'  value='0' />
-    <!-- Unused pin 11 -->
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_11.rtrim'        value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_11.input_buf_en' value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_11.wk_pu_en'     value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_11.pu_slw_rt'    value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_11.pd_slw_rt'    value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_11.pu_drv_strg'  value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_11.pd_drv_strg'  value='0' />
-    <!-- hps_sdio_D4, HPS_DEDICATED_12, input, weak pull up enable, is output, Fast Slew, 1_8 -->
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_12.rtrim'        value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_12.input_buf_en' value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_12.wk_pu_en'     value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_12.pu_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_12.pd_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_12.pu_drv_strg'  value='8' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_12.pd_drv_strg'  value='10' />
-    <!-- hps_sdio_D5, HPS_DEDICATED_13, input, weak pull up enable, is output, Fast Slew, 1_8 -->
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_13.rtrim'        value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_13.input_buf_en' value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_13.wk_pu_en'     value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_13.pu_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_13.pd_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_13.pu_drv_strg'  value='8' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_13.pd_drv_strg'  value='10' />
-    <!-- hps_sdio_D6, HPS_DEDICATED_14, input, weak pull up enable, is output, Fast Slew, 1_8 -->
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_14.rtrim'        value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_14.input_buf_en' value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_14.wk_pu_en'     value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_14.pu_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_14.pd_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_14.pu_drv_strg'  value='8' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_14.pd_drv_strg'  value='10' />
-    <!-- hps_sdio_D7, HPS_DEDICATED_15, input, weak pull up enable, is output, Fast Slew, 1_8 -->
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_15.rtrim'        value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_15.input_buf_en' value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_15.wk_pu_en'     value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_15.pu_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_15.pd_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_15.pu_drv_strg'  value='8' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_15.pd_drv_strg'  value='10' />
-    <!-- hps_uart1_TX, HPS_DEDICATED_16, NOT input, weak pull up disable, is output, Fast Slew, 1_8 -->
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_16.rtrim'        value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_16.input_buf_en' value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_16.wk_pu_en'     value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_16.pu_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_16.pd_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_16.pu_drv_strg'  value='8' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_16.pd_drv_strg'  value='10' />
-    <!-- hps_uart1_RX, HPS_DEDICATED_17, input, weak pull up disable, Not Output, Default, 1_8 -->
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_17.rtrim'        value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_17.input_buf_en' value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_17.wk_pu_en'     value='0' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_17.pu_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_17.pd_slw_rt'    value='1' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_17.pu_drv_strg'  value='8' />
-    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_17.pd_drv_strg'  value='10' />
-    <config name='i_io48_pin_mux.configuration_dedicated_io_bank.voltage_sel_clkrst_io' value='1' />
-    <config name='i_io48_pin_mux.configuration_dedicated_io_bank.voltage_sel_peri_io'   value='1' />
-  </csr>
-  <option_flags>
-    <config name='chosen.early-release-fpga-config'  value='1' />
-  </option_flags>
- <!-- End of the section generated by Quartus Prime -->
-</hps>
diff --git a/quartus/qsys/arria10_hps/synth/arria10_hps.qicache b/quartus/qsys/arria10_hps/synth/arria10_hps.qicache
deleted file mode 100644
index 7f163b09f08f37d114631c863cf959622f1f5787..0000000000000000000000000000000000000000
--- a/quartus/qsys/arria10_hps/synth/arria10_hps.qicache
+++ /dev/null
@@ -1,9 +0,0 @@
-<?xml version='1.0' encoding='us-ascii'?>
-<qsys_generation_info>
-<qsys_file path="/rsa_project/jchomick/adtran_work/fpga_groups_project/quartus/qsys/arria10_hps.qsys" />
-<gen_dir path="/rsa_project/jchomick/adtran_work/fpga_groups_project/quartus/qsys/arria10_hps/" />
-<user_regen_policy value="Never Regenerate Existing IP" />
-<actual_regen_policy value="Never Regenerate Existing IP" />
-<gen_action value="IP Generation Skipped" />
-<gen_status value="IP Generation Succeeded" />
-</qsys_generation_info>
\ No newline at end of file
diff --git a/quartus/qsys/emif_a10_hps/synth/emif_a10_hps.qicache b/quartus/qsys/emif_a10_hps/synth/emif_a10_hps.qicache
deleted file mode 100644
index 696fe09b3254143b2bc22aae189f6e9e70a8c91a..0000000000000000000000000000000000000000
--- a/quartus/qsys/emif_a10_hps/synth/emif_a10_hps.qicache
+++ /dev/null
@@ -1,9 +0,0 @@
-<?xml version='1.0' encoding='us-ascii'?>
-<qsys_generation_info>
-<qsys_file path="/rsa_project/jchomick/adtran_work/fpga_groups_project/quartus/qsys/emif_a10_hps.qsys" />
-<gen_dir path="/rsa_project/jchomick/adtran_work/fpga_groups_project/quartus/qsys/emif_a10_hps/" />
-<user_regen_policy value="Never Regenerate Existing IP" />
-<actual_regen_policy value="Never Regenerate Existing IP" />
-<gen_action value="IP Generation Skipped" />
-<gen_status value="IP Generation Succeeded" />
-</qsys_generation_info>
\ No newline at end of file
diff --git a/rtl/top/soc_system.sv.bak b/rtl/top/soc_system.sv.bak
deleted file mode 100644
index 9b361e30e458873c99e9c5f2e9925550bbea6a05..0000000000000000000000000000000000000000
--- a/rtl/top/soc_system.sv.bak
+++ /dev/null
@@ -1,281 +0,0 @@
-module soc_system # (
-    parameter NUM_OF_CHANNEL = 2
- )(
-  // FPGA clock and reset
-  input  wire          fpga_clk_100,
-  input  wire          fpga_reset_n,
-
-  input                fpga_clk_50, 
-  input                refclk,
-    
-  // Serial Interface
-  input       [NUM_OF_CHANNEL-1:0]    rx_serial_data,
-  output      [NUM_OF_CHANNEL-1:0]    tx_serial_data,
-    
-  // HPS memory controller ports
-  // DDR4 single rank -2133
-  input  wire          emif_ref_clk,
-  output wire          hps_memory_mem_act_n,
-  output wire          hps_memory_mem_bg,
-  output wire          hps_memory_mem_par,
-  input  wire          hps_memory_mem_alert_n,
-  inout  wire [ 3:0]   hps_memory_mem_dbi_n,
-  output wire [16:0]   hps_memory_mem_a,
-  output wire [ 1:0]   hps_memory_mem_ba,
-  output wire          hps_memory_mem_ck,
-  output wire          hps_memory_mem_ck_n,
-  output wire          hps_memory_mem_cke,
-  output wire          hps_memory_mem_cs_n,
-  output wire          hps_memory_mem_reset_n,
-  inout  wire [31:0]   hps_memory_mem_dq,
-  inout  wire [ 3:0]   hps_memory_mem_dqs,
-  inout  wire [ 3:0]   hps_memory_mem_dqs_n,
-  output wire          hps_memory_mem_odt,
-  input  wire          hps_memory_oct_rzqin,
-  // HPS peripherals
-  output wire          hps_emac0_TX_CLK,
-  output wire          hps_emac0_TXD0,
-  output wire          hps_emac0_TXD1,
-  output wire          hps_emac0_TXD2,
-  output wire          hps_emac0_TXD3,
-  input  wire          hps_emac0_RXD0,
-  inout  wire          hps_emac0_MDIO,
-  output wire          hps_emac0_MDC,
-  input  wire          hps_emac0_RX_CTL,
-  output wire          hps_emac0_TX_CTL,
-  input  wire          hps_emac0_RX_CLK,
-  input  wire          hps_emac0_RXD1,
-  input  wire          hps_emac0_RXD2,
-  input  wire          hps_emac0_RXD3,
-  inout  wire          hps_usb0_D0,
-  inout  wire          hps_usb0_D1,
-  inout  wire          hps_usb0_D2,
-  inout  wire          hps_usb0_D3,
-  inout  wire          hps_usb0_D4,
-  inout  wire          hps_usb0_D5,
-  inout  wire          hps_usb0_D6,
-  inout  wire          hps_usb0_D7,
-  input  wire          hps_usb0_CLK,
-  output wire          hps_usb0_STP,
-  input  wire          hps_usb0_DIR,
-  input  wire          hps_usb0_NXT,
-  output wire          hps_spim1_CLK,
-  output wire          hps_spim1_MOSI,
-  input  wire          hps_spim1_MISO,
-  output wire          hps_spim1_SS0_N,
-  output wire          hps_spim1_SS1_N,
-  input  wire          hps_uart1_RX,
-  output wire          hps_uart1_TX,
-  inout  wire          hps_i2c1_SDA,
-  inout  wire          hps_i2c1_SCL,
-  inout  wire          hps_sdio_CMD,
-  output wire          hps_sdio_CLK,
-  inout  wire          hps_sdio_D0,
-  inout  wire          hps_sdio_D1,
-  inout  wire          hps_sdio_D2,
-  inout  wire          hps_sdio_D3,
-  inout  wire          hps_sdio_D4,
-  inout  wire          hps_sdio_D5,
-  inout  wire          hps_sdio_D6,
-  inout  wire          hps_sdio_D7
-);
-
-// internal wires and registers declaration
-wire [27:0] a10_stm_hw_events;
-wire [31:0] a10_hps_f2h_irq0;
-wire [31:0] a10_hps_f2h_irq1;
-wire        hps_fpga_reset_n;
-wire        tse_resetn;
-// connection of internal logics
-assign a10_stm_hw_events = '0;
-assign a10_hps_f2h_irq0  = '0;
-assign a10_hps_f2h_irq1  = '0;
-
-assign hps_fpga_reset_n = fpga_reset_n;
-
-localparam ADDRESS_WIDTH = 8;
-localparam ID_WIDTH      = 12;
-
-//------------------------------------------
-//------------- INTERFACES -----------------
-//------------------------------------------
-axi4_mm_if #(
-    .DATA_BYTES      (4),
-    .ADDRESS_WIDTH   (ADDRESS_WIDTH),
-    .ID_WIDTH        (ID_WIDTH)
-) a10_hps_h2f_lw_axi_master (
-    .aclk            (fpga_clk_100),
-    .areset_n        (hps_fpga_reset_n)
-);
-
-axi4_mm_if #(
-    .DATA_BYTES      (4),
-    .ADDRESS_WIDTH   (ADDRESS_WIDTH),
-    .ID_WIDTH        (ID_WIDTH)
-) axi_ram_axi_slave (
-    .aclk            (fpga_clk_100),
-    .areset_n        (hps_fpga_reset_n)
-);
-
-// Interconnect of AXI-MM Master & Slave IF
-assign axi_ram_axi_slave.awid               = a10_hps_h2f_lw_axi_master.awid;
-assign axi_ram_axi_slave.awaddr             = a10_hps_h2f_lw_axi_master.awaddr;
-assign axi_ram_axi_slave.awlen              = a10_hps_h2f_lw_axi_master.awlen;
-assign axi_ram_axi_slave.awsize             = a10_hps_h2f_lw_axi_master.awsize;
-assign axi_ram_axi_slave.awburst            = a10_hps_h2f_lw_axi_master.awburst;
-assign axi_ram_axi_slave.awlock             = a10_hps_h2f_lw_axi_master.awlock;
-assign axi_ram_axi_slave.awcache            = a10_hps_h2f_lw_axi_master.awcache;
-assign axi_ram_axi_slave.awprot             = a10_hps_h2f_lw_axi_master.awprot;
-assign axi_ram_axi_slave.awqos              = a10_hps_h2f_lw_axi_master.awqos;
-assign axi_ram_axi_slave.awregion           = a10_hps_h2f_lw_axi_master.awregion;
-assign axi_ram_axi_slave.awuser             = a10_hps_h2f_lw_axi_master.awuser;
-assign axi_ram_axi_slave.awvalid            = a10_hps_h2f_lw_axi_master.awvalid;
-assign a10_hps_h2f_lw_axi_master.awready    = axi_ram_axi_slave.awready;
-
-assign axi_ram_axi_slave.wid                = a10_hps_h2f_lw_axi_master.wid;
-assign axi_ram_axi_slave.wdata              = a10_hps_h2f_lw_axi_master.wdata;
-assign axi_ram_axi_slave.wstrb              = a10_hps_h2f_lw_axi_master.wstrb;
-assign axi_ram_axi_slave.wlast              = a10_hps_h2f_lw_axi_master.wlast;
-assign axi_ram_axi_slave.wuser              = a10_hps_h2f_lw_axi_master.wuser;
-assign axi_ram_axi_slave.wvalid             = a10_hps_h2f_lw_axi_master.wvalid;
-assign a10_hps_h2f_lw_axi_master.wready     = axi_ram_axi_slave.wready;
-
-assign a10_hps_h2f_lw_axi_master.bid        = axi_ram_axi_slave.bid;
-assign a10_hps_h2f_lw_axi_master.bresp      = axi_ram_axi_slave.bresp;
-assign a10_hps_h2f_lw_axi_master.buser      = axi_ram_axi_slave.buser;
-assign a10_hps_h2f_lw_axi_master.bvalid     = axi_ram_axi_slave.bvalid;
-assign axi_ram_axi_slave.bready             = a10_hps_h2f_lw_axi_master.bready;
-
-assign axi_ram_axi_slave.arid               = a10_hps_h2f_lw_axi_master.arid;
-assign axi_ram_axi_slave.araddr             = a10_hps_h2f_lw_axi_master.araddr;
-assign axi_ram_axi_slave.arlen              = a10_hps_h2f_lw_axi_master.arlen;
-assign axi_ram_axi_slave.arsize             = a10_hps_h2f_lw_axi_master.arsize;
-assign axi_ram_axi_slave.arburst            = a10_hps_h2f_lw_axi_master.arburst;
-assign axi_ram_axi_slave.arlock             = a10_hps_h2f_lw_axi_master.arlock;
-assign axi_ram_axi_slave.arcache            = a10_hps_h2f_lw_axi_master.arcache;
-assign axi_ram_axi_slave.arprot             = a10_hps_h2f_lw_axi_master.arprot;
-assign axi_ram_axi_slave.arqos              = a10_hps_h2f_lw_axi_master.arqos;
-assign axi_ram_axi_slave.arregion           = a10_hps_h2f_lw_axi_master.arregion;
-assign axi_ram_axi_slave.aruser             = a10_hps_h2f_lw_axi_master.aruser;
-assign axi_ram_axi_slave.arvalid            = a10_hps_h2f_lw_axi_master.arvalid;
-assign a10_hps_h2f_lw_axi_master.arready    = axi_ram_axi_slave.arready;
-
-assign a10_hps_h2f_lw_axi_master.rid        = axi_ram_axi_slave.rid;
-assign a10_hps_h2f_lw_axi_master.rdata      = axi_ram_axi_slave.rdata;
-assign a10_hps_h2f_lw_axi_master.rresp      = axi_ram_axi_slave.rresp;
-assign a10_hps_h2f_lw_axi_master.rlast      = axi_ram_axi_slave.rlast;
-assign a10_hps_h2f_lw_axi_master.ruser      = axi_ram_axi_slave.ruser;
-assign a10_hps_h2f_lw_axi_master.rvalid     = axi_ram_axi_slave.rvalid;
-assign axi_ram_axi_slave.rready             = a10_hps_h2f_lw_axi_master.rready;
-
-//------------------------------------------
-//----------- AXI RAM WRAPPER --------------
-//------------------------------------------
-axi_ram_wrapper #(
-    .ADDR_WIDTH     (ADDRESS_WIDTH),
-    .ID_WIDTH       (ID_WIDTH)
-) u_axi_ram_wrapper (
-    .clk            (fpga_clk_100),
-    .reset_n        (hps_fpga_reset_n),
-
-    .axi4_mm_slave  (axi_ram_axi_slave)
-);
-
-//------------------------------------------
-//------------- HPS WRAPPER ----------------
-//------------------------------------------
-hps_wrapper u_hps_wrapper (
-    // FPGA -> HPS Reset and interrupt
-    .a10_hps_f2h_cold_reset_n       (hps_fpga_reset_n),
-    .a10_hps_f2h_debug_reset_n      (hps_fpga_reset_n),
-    .a10_hps_f2h_warm_reset_n       (hps_fpga_reset_n),
-    .a10_hps_f2h_irq0               (a10_hps_f2h_irq0),
-  	.a10_hps_f2h_irq1               (a10_hps_f2h_irq1),
-    .a10_hps_f2h_stm_hw_events      (a10_stm_hw_events),
-
-    // HPS -> FPGA AXI MASTER
-    .a10_hps_h2f_axi_master_clk     (1'b0),
-    .a10_hps_h2f_axi_master_reset_n (1'b0),
-    .a10_hps_h2f_axi_master         (),
-
-    // HPS -> FPGA AXI MASTER LIGHTWEIGHT
-    .a10_hps_h2f_lw_axi_master_clk      (fpga_clk_100),
-    .a10_hps_h2f_lw_axi_master_reset_n  (hps_fpga_reset_n),
-    .a10_hps_h2f_lw_axi_master          (a10_hps_h2f_lw_axi_master),
-
-    // FPGA -> HPS AXI SLAVE
-    .a10_hps_f2h_axi_slave_clk      (1'b0),
-    .a10_hps_f2h_axi_slave_reset_n  (1'b0),
-    .a10_hps_f2h_axi_slave          (),
-
-
-    // DDR4 single rank -2133 device
-    .emif_ref_clk                   (emif_ref_clk),
-    .emif_reset_n                   (hps_fpga_reset_n),
-    .hps_memory_mem_act_n           (hps_memory_mem_act_n),
-    .hps_memory_mem_bg              (hps_memory_mem_bg),
-    .hps_memory_mem_par             (hps_memory_mem_par),
-    .hps_memory_mem_alert_n         (hps_memory_mem_alert_n),
-    .hps_memory_mem_dbi_n           (hps_memory_mem_dbi_n),
-    .hps_memory_mem_a               (hps_memory_mem_a),
-    .hps_memory_mem_ba              (hps_memory_mem_ba),
-    .hps_memory_mem_ck              (hps_memory_mem_ck),
-    .hps_memory_mem_ck_n            (hps_memory_mem_ck_n),
-    .hps_memory_mem_cke             (hps_memory_mem_cke),
-    .hps_memory_mem_cs_n            (hps_memory_mem_cs_n),
-    .hps_memory_mem_reset_n         (hps_memory_mem_reset_n),
-    .hps_memory_mem_dq              (hps_memory_mem_dq),
-    .hps_memory_mem_dqs             (hps_memory_mem_dqs),
-    .hps_memory_mem_dqs_n           (hps_memory_mem_dqs_n),
-    .hps_memory_mem_odt             (hps_memory_mem_odt),
-    .hps_memory_oct_rzqin           (hps_memory_oct_rzqin),
-
-    // HPS peripherals
-    .a10_hps_phery_emac0_TX_CLK     (hps_emac0_TX_CLK),
-    .a10_hps_phery_emac0_TXD0       (hps_emac0_TXD0),
-    .a10_hps_phery_emac0_TXD1       (hps_emac0_TXD1),
-    .a10_hps_phery_emac0_TXD2       (hps_emac0_TXD2),
-    .a10_hps_phery_emac0_TXD3       (hps_emac0_TXD3),
-    .a10_hps_phery_emac0_RX_CTL     (hps_emac0_RX_CTL),
-    .a10_hps_phery_emac0_TX_CTL     (hps_emac0_TX_CTL),
-    .a10_hps_phery_emac0_RX_CLK     (hps_emac0_RX_CLK),
-    .a10_hps_phery_emac0_RXD0       (hps_emac0_RXD0),
-    .a10_hps_phery_emac0_RXD1       (hps_emac0_RXD1),
-    .a10_hps_phery_emac0_RXD2       (hps_emac0_RXD2),
-    .a10_hps_phery_emac0_RXD3       (hps_emac0_RXD3),
-    .a10_hps_phery_emac0_MDIO       (hps_emac0_MDIO),
-    .a10_hps_phery_emac0_MDC        (hps_emac0_MDC),
-    .a10_hps_phery_sdmmc_CMD        (hps_sdio_CMD),
-    .a10_hps_phery_sdmmc_D0         (hps_sdio_D0),
-    .a10_hps_phery_sdmmc_D1         (hps_sdio_D1),
-    .a10_hps_phery_sdmmc_D2         (hps_sdio_D2),
-    .a10_hps_phery_sdmmc_D3         (hps_sdio_D3),
-    .a10_hps_phery_sdmmc_D4         (hps_sdio_D4),
-    .a10_hps_phery_sdmmc_D5         (hps_sdio_D5),
-    .a10_hps_phery_sdmmc_D6         (hps_sdio_D6),
-    .a10_hps_phery_sdmmc_D7         (hps_sdio_D7),
-    .a10_hps_phery_sdmmc_CCLK       (hps_sdio_CLK),
-    .a10_hps_phery_usb0_DATA0       (hps_usb0_D0),
-    .a10_hps_phery_usb0_DATA1       (hps_usb0_D1),
-    .a10_hps_phery_usb0_DATA2       (hps_usb0_D2),
-    .a10_hps_phery_usb0_DATA3       (hps_usb0_D3),
-    .a10_hps_phery_usb0_DATA4       (hps_usb0_D4),
-    .a10_hps_phery_usb0_DATA5       (hps_usb0_D5),
-    .a10_hps_phery_usb0_DATA6       (hps_usb0_D6),
-    .a10_hps_phery_usb0_DATA7       (hps_usb0_D7),
-    .a10_hps_phery_usb0_CLK         (hps_usb0_CLK),
-    .a10_hps_phery_usb0_STP         (hps_usb0_STP),
-    .a10_hps_phery_usb0_DIR         (hps_usb0_DIR),
-    .a10_hps_phery_usb0_NXT         (hps_usb0_NXT),
-    .a10_hps_phery_spim1_CLK        (hps_spim1_CLK),
-    .a10_hps_phery_spim1_MOSI       (hps_spim1_MOSI),
-    .a10_hps_phery_spim1_MISO       (hps_spim1_MISO),
-    .a10_hps_phery_spim1_SS0_N      (hps_spim1_SS0_N),
-    .a10_hps_phery_spim1_SS1_N      (hps_spim1_SS1_N),
-    .a10_hps_phery_uart1_RX         (hps_uart1_RX),
-    .a10_hps_phery_uart1_TX         (hps_uart1_TX),
-    .a10_hps_phery_i2c1_SDA         (hps_i2c1_SDA),
-    .a10_hps_phery_i2c1_SCL         (hps_i2c1_SCL)
-);
-
-endmodule
\ No newline at end of file