From 7e3af51357037c1de06f5c25e748dc860805b136 Mon Sep 17 00:00:00 2001
From: MACIEJ BARZOWSKI <maciej.barzowski@pg.edu.pl>
Date: Tue, 29 Oct 2024 09:59:21 +0100
Subject: [PATCH] Updated README
---
README.md | 210 +-----------------------------------------------------
1 file changed, 3 insertions(+), 207 deletions(-)
diff --git a/README.md b/README.md
index bf0ada0..b0d7ad4 100644
--- a/README.md
+++ b/README.md
@@ -4,217 +4,13 @@
* DE0 Nano SoC board: https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=167&No=941
* Arria10 SoC DevKit board: https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/arria/10-sx.html
-## Directory structure
-
-```
-|-- meta-intel-fpga
-|-- meta-openembedded
-|-- poky
-|-- meta-fpga-iot
- |-- conf - Yocto build configuration files directory
- |-- meta-de0-nano - De0 Nano SoC Kit platform specific recipes
- |-- meta-a10soc-devkit - Arria10 SoC DevKit platform specific recipes
- |-- meta-common - common recpies
- |-- sources - ...
-
-```
-## Yocto building (Kernel, DTS, RootFS)
-Yocto building procedure is based on the one from https://rocketboards.org/foswiki/Documentation/YoctoDoraBuildWithMetaAltera
-Custom layer was added to bring image features flexibility, e.g. adding/removing RootFS contatin, DTS modification depends on platform, etc.
-
-Yocto manual: https://docs.yoctoproject.org/
-
### Steps
Clone project repository:
git clone git@git.pg.edu.pl:p765918/intel_fpga_yocto.git
+Select the appropriate branch depending on the board:
-Initialize git submodule:
-
- git submodule update --init --recursive
-
-Select board configuration:
-
- export TEMPLATECONF=../meta-fpga-iot/meta-de0-nano/conf/
- or
- export TEMPLATECONF=../meta-fpga-iot/meta-a10soc-devkit/conf/
-
-Source build environment:
-
- source poky/oe-init-build-env
-
-Source build environment:
-
- bitbake fpga-iot-image
-
-#### De0 Nano Board:
-* kernel: [BUILDROOT]/tmp/deploy/images/de0-nano/zImage
-* dtb: [BUILDROOT]/tmp/deploy/images/de0-nano/de0-nano.dtb
-* u-boot: [BUILDROOT]/tmp/deploy/images/de0-nano/u-boot-with-spl.sfp
-* rootfs: [BUILDROOT]/tmp/deploy/images/de0-nano/fpga-iot-image-de0-nano.[ext,jffs2,...]
-* SDMMC image: [BUILDROOT]/tmp/deploy/images/de0-nano/fpga-iot-image-de0-nano.wic
-
-#### Arria10 SoC DevKit Board:
-* kernel: [BUILDROOT]/tmp/deploy/images/a10soc-devkit/zImage
-* dtb: [BUILDROOT]/tmp/deploy/images/a10soc-devkit/a10soc-devkit.dtb
-* u-boot: [BUILDROOT]/tmp/deploy/images/a10soc-devkit/u-boot-splx4.sfp
-* rootfs: [BUILDROOT]/tmp/deploy/images/a10soc-devkit/fpga-iot-image-a10soc-devkit.[ext,jffs2,...]
-* SDMMC image: [BUILDROOT]/tmp/deploy/images/a10soc-devkit/fpga-iot-image-a10soc-devkit.wic
-
-## FPGA image
-FPGA image shall be also added to SDMMC. It will be loaded automatically during boot by U-Boot. U-Boot requires special format for the file: RBF - Raw Binary File, and special name for the file: 'soc_system.rbf' on De0 Nano Board and soc_system.core.rbf for Arria10 SoC DevKit Board. File shall be put in the FAT partition. </br>
-
-### De0 Nano Board:
-
-Convert .SOF to .RBF (folder quartus/output_files):
-
-* Under Windows/Linux: https://www.intel.com/content/www/us/en/docs/programmable/683536/current/single-rbf-conversion-using-the-gui.html
-* Under Linux: `quartus_cpf -o bitstream_compression=on -c soc_system.sof soc_system.rbf`
-
-### Arria10 SoC DevKit Board:
-Convert .SOF to .RBF (folder quartus/output_files):
-* Under Linux: `quartus_cpf --hps -o bitstream_compression=on -c soc_system.sof soc_system.rbf`
-
-Create `fit_spl_fpga.its` file with the following content:
-
-```
-// SPDX-Licence-Identifirt: GPL-2.0
-/*
-* Copyright (C) 2019 Intel Corporation <www.intel.com>
-*
-*/
-
-/dts-v1/;
-/ {
- description = "FIT image with FPGA bistream";
- #address-cells = <1>;
-
- images {
- fpga-periph-1{
- description = "FPGA peripheral bitstream";
- data = /incbin/("soc_system.periph.rbf");
- type = "fpga";
- arch = "arm";
- compression = "none";
- };
- };
-
- configurations {
- default = "config-1";
- config-1 {
- description = "Boot with FPGA early IO release config";
- fpga = "fpga-periph-1";
- };
- };
-
-};
-```
-
-Make image for U-boot:
-
- mkimage -E -f fit_spl_fpga.its fit_spl_fpga.itb
-
-
-## Updating image on SDMMC
-### De0 Nano Board:
-1. Copy .wic image to sdmmc:
-* Under Linux (with SDMMC mounted): sudo dd if=image.wic of=/dev/sdX bs=1M iflag=fullblock oflag=direct conv=fsync
-* Under Windows (with SDMMC mounted): use Win32DiskImage or any other available tool
-
-2. Copy soc_system.rbf to sdmmc
-
-### Arria10 SoC DevKit Board:
-1. Copy .wic image to sdmmc:
-* Under Linux (with SDMMC mounted): sudo dd if=image.wic of=/dev/sdX bs=1M iflag=fullblock oflag=direct conv=fsync
-* Under Windows (with SDMMC mounted): use Win32DiskImage or any other available tool
-
-2. Copy 3 files to sdmmc: `fit_spl_fpga.itb`, `soc_system.core.rbf` and `soc_system.periph.rbf`
-
-3. Rename `a10soc-devkit.dtb` to `socfpga_arria10_socdk_sdmmc.dtb`
-
-### Under U-Boot:
-* download .wic image to RAM using TFTP using 'tftp'(set up mac address, ip address, tftp server ip address) or 'dhcp'(set up mac address, tftp server ip address) commands
-* write .wic image from RAM to SDMMC: mmc write $loadaddr 0x0 [size of .wic image in blocks], block is 512 bytes size
-
-### Under Linux:
-Some parts (kernel, dtb, fpga) can be also updated under Linux. The following steps shall be taken:
-
-* mkdir /mnt/boot
-* mount /dev/mmcblk0p1 /mnt/boot/
-
-Under /mnt/boot the following images shall be available:
-
-* zImage - Kernel
-* de0-nano.dtb/a10soc-devkit.dtb - Device Tree
-* soc_system.rbf - FPGA Bitstream
-
-It is enought to copy new images there and reboot the system
-
-## Network
-### MAC address
-Boards does not have any EEPROM or ther non-volatile memory except SDMMC. Thius after each SDMMC re-flash need to provision MAC address. To do that please run the follo
-wing command in U-Boot console (replace example MAC address with the right one):
-
-```
-setenv ethaddr 66:55:44:33:22:11
-saveenv
-reset
-```
-
-In case 'ethaddr' avariable is already available and it not possible to override it, please run the following command to bring back enviroment to default state.
-
-```
-env default -a -f
-```
-
-MAC address could be also changed in runtime under Linux. Please be aware that this setting is volatile.
-
-```
-# Change MAC address
-sudo ip link set dev eth0 down
-sudo ip link set dev eth0 address 66:55:44:33:22:11
-sudo ip link set dev eth0 up
-```
-
-To set up non-volatile cofiguration please edit "/etc/systemd/network/00-fpga-iot-eth0.network" file.
-To set up MAC address please add "[Link]" section and MACAddress variable under it (https://wiki.archlinux.org/index.php/MAC_address_spoofing#systemd-networkd), e.g.:
-
-```
-[Link]
-MACAddress=66:55:44:33:22:11
-```
-
-This method has precedence over setting MAC address via U-Boot enviroment variable.
-
-### IP address
-IP address could be changed in runtime under Linux. Please be aware that this setting is volatile.
-
-```
-# Change IP address
-sudo ip addr add 192.168.1.2 dev eth0
-```
-
-To set up non-volatile cofiguration for both IP please edit "/etc/systemd/network/00-fpga-iot-eth0.network" file.
-To set up IP please under "[Network]" section comment DHCP variable and add Address and Gateway variables (https://wiki.archlinux.org/index.php/Systemd-networkd#Wired_adapter_u
-sing_a_static_IP), e.g.:
-
-```
-[Network]
-#DHCP=ipv4
-LinkLocalAddressing=no
-Address=192.168.1.2
-Gateway=192.168.1.1
-```
-
-## Linux
-### Credentials
-
-* user: root
-* pass: fpgai0t
-
-### More users
-In case more userers are required there are two options:
+ DE0 Nano SoC board: git checkout de0-nano-soc
-* additionals users can be added on already deployed system: https://linuxize.com/post/how-to-create-users-in-linux-using-the-useradd-command/
-* users can be added by modification 'EXTRA_USERS_PARAMS' in local.conf.sample
+ Arria10 SoC DevKit board: git checkout aria10
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