diff --git a/README.md b/README.md
index bf0ada0d5784d255a8338c6c4c8c14538f0e4c49..300607886fee69c7a9abf35e613420c2943aa3ea 100644
--- a/README.md
+++ b/README.md
@@ -1,8 +1,7 @@
 # Repository for Linux stuff used mostly (but not only) for FPGA IoT uses cases
 
-## Supported boards
+## Supported board
 * DE0 Nano SoC board: https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=167&No=941
-* Arria10 SoC DevKit board: https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/arria/10-sx.html
 
 ## Directory structure
 
@@ -13,7 +12,6 @@
 |-- meta-fpga-iot
     |-- conf - Yocto build configuration files directory
     |-- meta-de0-nano - De0 Nano SoC Kit platform specific recipes
-    |-- meta-a10soc-devkit - Arria10 SoC DevKit platform specific recipes
     |-- meta-common - common recpies
     |-- sources - ...
 
@@ -34,11 +32,9 @@ Initialize git submodule:
 
     git submodule update --init --recursive
 
-Select board configuration:
+Set board configuration:
 
     export TEMPLATECONF=../meta-fpga-iot/meta-de0-nano/conf/
-    or
-    export TEMPLATECONF=../meta-fpga-iot/meta-a10soc-devkit/conf/
 
 Source build environment:
 
@@ -48,22 +44,16 @@ Source build environment:
 
     bitbake fpga-iot-image
 
-#### De0 Nano Board:
+#### Build results:
 * kernel: [BUILDROOT]/tmp/deploy/images/de0-nano/zImage
 * dtb: [BUILDROOT]/tmp/deploy/images/de0-nano/de0-nano.dtb
 * u-boot: [BUILDROOT]/tmp/deploy/images/de0-nano/u-boot-with-spl.sfp
 * rootfs: [BUILDROOT]/tmp/deploy/images/de0-nano/fpga-iot-image-de0-nano.[ext,jffs2,...]
 * SDMMC image: [BUILDROOT]/tmp/deploy/images/de0-nano/fpga-iot-image-de0-nano.wic
 
-#### Arria10 SoC DevKit Board:
-* kernel: [BUILDROOT]/tmp/deploy/images/a10soc-devkit/zImage
-* dtb: [BUILDROOT]/tmp/deploy/images/a10soc-devkit/a10soc-devkit.dtb
-* u-boot: [BUILDROOT]/tmp/deploy/images/a10soc-devkit/u-boot-splx4.sfp
-* rootfs: [BUILDROOT]/tmp/deploy/images/a10soc-devkit/fpga-iot-image-a10soc-devkit.[ext,jffs2,...]
-* SDMMC image: [BUILDROOT]/tmp/deploy/images/a10soc-devkit/fpga-iot-image-a10soc-devkit.wic
 
 ## FPGA image
-FPGA image shall be also added to SDMMC. It will be loaded automatically during boot by U-Boot. U-Boot requires special format for the file: RBF - Raw Binary File, and special name for the file: 'soc_system.rbf' on De0 Nano Board and soc_system.core.rbf for Arria10 SoC DevKit Board. File shall be put in the FAT partition. </br>
+FPGA image shall be also added to SDMMC. It will be loaded automatically during boot by U-Boot. U-Boot requires special format for the file: RBF - Raw Binary File, and special name for the file: 'soc_system.rbf' on De0 Nano Board. File shall be put in the FAT partition. </br>
 
 ### De0 Nano Board:
 
@@ -72,67 +62,13 @@ Convert .SOF to .RBF (folder quartus/output_files):
 * Under Windows/Linux: https://www.intel.com/content/www/us/en/docs/programmable/683536/current/single-rbf-conversion-using-the-gui.html
 * Under Linux: `quartus_cpf -o bitstream_compression=on -c soc_system.sof soc_system.rbf`
 
-### Arria10 SoC DevKit Board:
-Convert .SOF to .RBF (folder quartus/output_files):
-* Under Linux: `quartus_cpf --hps -o bitstream_compression=on -c soc_system.sof soc_system.rbf`
-
-Create `fit_spl_fpga.its` file with the following content:
-
-```
-// SPDX-Licence-Identifirt: GPL-2.0
-/*
-* Copyright (C) 2019 Intel Corporation <www.intel.com>
-*
-*/
-
-/dts-v1/;
-/ {
-    description = "FIT image with FPGA bistream";
-    #address-cells = <1>;
-
-    images {
-        fpga-periph-1{
-            description = "FPGA peripheral bitstream";
-            data = /incbin/("soc_system.periph.rbf");
-            type = "fpga";
-            arch = "arm";
-            compression = "none";
-        };
-    };
-
-    configurations {
-        default = "config-1";
-        config-1 {
-            description = "Boot with FPGA early IO release config";
-            fpga = "fpga-periph-1";
-        };
-    };
-
-};
-```
-
-Make image for U-boot:
-
-    mkimage -E -f fit_spl_fpga.its fit_spl_fpga.itb
-
-
 ## Updating image on SDMMC
-### De0 Nano Board:
 1. Copy .wic image to sdmmc: 
 * Under Linux (with SDMMC mounted): sudo dd if=image.wic of=/dev/sdX bs=1M iflag=fullblock oflag=direct conv=fsync
 * Under Windows (with SDMMC mounted): use Win32DiskImage or any other available tool
 
 2. Copy soc_system.rbf to sdmmc
 
-### Arria10 SoC DevKit Board:
-1. Copy .wic image to sdmmc: 
-* Under Linux (with SDMMC mounted): sudo dd if=image.wic of=/dev/sdX bs=1M iflag=fullblock oflag=direct conv=fsync
-* Under Windows (with SDMMC mounted): use Win32DiskImage or any other available tool
-
-2. Copy 3 files to sdmmc: `fit_spl_fpga.itb`, `soc_system.core.rbf` and `soc_system.periph.rbf`
-
-3. Rename  `a10soc-devkit.dtb` to `socfpga_arria10_socdk_sdmmc.dtb`
-
 ### Under U-Boot:
 * download .wic image to RAM using TFTP using 'tftp'(set up mac address, ip address, tftp server ip address) or 'dhcp'(set up mac address, tftp server ip address) commands
 * write .wic image from RAM to SDMMC: mmc write $loadaddr 0x0 [size of .wic image in blocks], block is 512 bytes size